WORKSHOP PAPER
A native HDR 115dB 3.2µm BSI pixel using electron and hole collection
Abstract
A new pixel architecture providing HDR capability coupled with excellent low-light performance and compatibility with pulsed light sources or fast moving objects is presented. The pixel concept is based on a combination of electron collection via a pinned diode for low signal levels, and hole collection with capacitive storage for higher signal levels. The accumulated electrons and holes are generated by the same incident photons. This concept is demonstrated with a 3.2µm pixel fabricated in a back-side illuminated (BSI) process including capacitive deep trench isolation (CDTI).Keywords
HDR pixel, BSI sensor, deep trench isolation,References
1) M. Mase et al., "A 19.5b Dynamic Range CMOS Image Sensor with 12b Column-Parallel Cyclic A/D Converters", ISSCC Dig. Tech. Papers, 2005. https://doi.org/10.1109/isscc.2005.1494013
2) S. Sugawa et al., "A 100dB Dynamic Range CMOS Image Sensor Using a Lateral Overflow Integration Capacitor", ISSCC Dig. Tech. Papers, 2005. https://doi.org/10.1109/isscc.2005.1494014
3) J. Michelot et al., "Back Illuminated Vertically Pinned Photodiode with in Depth Charge Storage", International Image Sensor Worshop, 2011. https://doi.org/10.60928/weee-efo6
4) N. Ahmed et al., "MOS Capacitor Deep Trench Isolation for CMOS Image sensors", IEEE International Electron Devices Meeting (IEDM), 2014. https://doi.org/10.1109/iedm.2014.7046979