WORKSHOP PAPER
On The Pixel Level Estimation of Pinning Voltage, Pinned Photodiode Capacitance and Transfer Gate Channel Potential
Vincent Goiffon1, Julien Michelot2, Pierre Magnan1, Magali Estribeau1, Olivier Marcelot1, Paola Cervantes1, Alice Pelamatti1, Philippe Martin-Gonthier1
1ISAE, Université de Toulouse, 10 avenue Edouard Belin, 31055 Toulouse, France
2Pyxalis, 31 rue Gustave Eiffel, 38000 Grenoble, France

Abstract

The pinning voltage extraction method proposed by Tan et al. is analyzed to clarify its benefits and limitations. It is demonstrated that this simple measurement can bring much more useful information than the pinning voltage, such as the pinned photodiode capacitance and the transfer gate channel potential. Objective criteria to compare the pinning voltage on different devices are also discussed.
Publisher: IISS (Int. Image Sensors Society)
Year: 2013
Workshop: IISW
URL: https://doi.org/10.60928/0gmc-s6ko

Keywords

Pinning Voltage, Pinned Photodiode Capacitance, Transfer Gate Channel Potential,

References

1) J. Hynecek, IEEE Trans. Electron Dev., vol.28, no.5, May 1981, 1981
2) A. Krymski et al., in Proc. IEEE Workshop CCD/AIS, 2005, 2005
3) V. Goiffon et al., IEEE Trans. Nucl. Sci. vol. 59, no.6, Dec. 2012, 2012
4) J. Tan et al., IEEE Sens. J., vol. 12, no. 6, Jun. 2012, 2012
5) L. Bonjour et al., IEEE Electron Dev. Lett., vol.33, no.12, Dec. 2012, 2012
6) S. Park et al., Microelectron. J., vol. 40, no.1, Jan. 2009, 2009