WORKSHOP PAPER
Temporal Noise Suppression Method using Noise -Bandwidth Limitation for Pixel -Level Single -Slope ADC
Abstract
This paper proposes a method for reducing temporal random noise in a pixel-level single-slope analog-to-digital converter of a global-shutter CMOS image sensor. By employing a noise-bandwidth limiting technique in the single-slope ADC circuit, a significant portion of thermal noise is filtered out, resulting in over 30% noise reduction compared with global shutter CMOS image sensors without the bandwidth limiting capacitor. This method is applied to a digital pixel sensor with a 4.95-µm pixel pitch and 2-megapixel resolution, demonstrating successful evaluation.Keywords
CMOS Image sensor, global shutter, pixel-level ADC, noise bandwidth limitation, temporal random noise, flicker noise, thermal noise, single-slope ADC,References
1) H. Kim et al., "5.6 A 1/2.65in 44Mpixel CMOS image sensor with 0.7μm pixels fabricated in advanced full-depth deep-trench isolation technology", IEEE ISSCC Dig. Tech. Papers, 2020. https://doi.org/10.1109/isscc19947.2020.9062924
2) Y. Nitta et al., "High-speed digital double sampling with analog CDS on column parallel ADC architecture for low-noise active pixel sensor", IEEE ISSCC Dig. Tech. Papers, 2006. https://doi.org/10.1109/isscc.2006.1696261
3) Martijn F. Snoeij et al., "A CMOS imager with column-level ADC using dynamic column fixed-pattern noise reduction", IEEE J. solid state circuit, 2006. https://doi.org/10.1109/jssc.2006.884866
4) M. Sakakibara et al., "A back-illuminated global-shutter CMOS image sensor with pixel-parallel 14b subthreshold ADC", IEEE ISSCC Dig. Tech. Papers, 2018. https://doi.org/10.1109/isscc.2018.8310193
5) T. Takahashi et al., "A stacked CMOS image sensor with array-parallel ADC architecture", IEEE J. Solid-State Circuits, 2018. https://doi.org/10.1109/jssc.2017.2784759
6) K. Mori et al., "A 4.0μm stacked digital pixel sensor operating in a dual quantization mode for high dynamic range", Proc. Int. Image Sensor Workshop (IISW), 2021. https://doi.org/10.1109/ted.2022.3164032
7) M. Chu, et al., "An Extremely High-Speed and Low-Power Digital Pixel Sensor with Advanced Sensor Architecture", International Image Sensor Workshop (IISW), 2021. https://doi.org/10.60928/9wao-wmu8
8) M.-W. Seo et al., "2.45 e-rms low-random-noise, 598.5 mW low-power, and 1.2 kfps high-speed 2-Mp global shutter CMOS image sensor with pixel-level ADC and memory", IEEE J. Solid-State Circuits, 2022. https://doi.org/10.1109/jssc.2022.3142436
9) H. Y. Jung et al., "Design and analysis on low-power and low-noise single slope ADC for digital pixel sensors", Proc. Electron. Imag. (EI), 2022. https://doi.org/10.2352/ei.2022.34.7.iss-256