WORKSHOP PAPER
Parameter Estimation for Column Level Single Slope ADC Comparators
Abstract
In this paper we describe how to extract key performance parameters for the typical comparator used in a column parallel single slope ADC. We present a modified version of a comparator model. This model enables us to estimate the comparator time constant and the gain of the first stage trans-conductance amplifier. We use the measured delay time of the comparator as a function of the ramp slope. Using this model, we derive estimators for the switching speed and noise of the comparator. We also show that these estimators are in close agreement with SPICE simulation. Finally, we compare SPICE simulated noise with our model.Keywords
Parameter Estimation, Column Level, Single Slope, ADC, Comparators,References
1) T. Sepke et al., "Noise Analysis for Comparator-Based Circuits", IEEE Transactions on Circuits and Systems, 2009. https://doi.org/10.1109/tcsi.2008.2002547
2) J. Cheon and G. Han, "Noise Analysis and Simulation Method for a Single-Slope ADC With CDS in a CMOS Image Sensor", IEEE Transactions on Circuits and Systems, 2008. https://doi.org/10.1109/tcsi.2008.923434
3) Hyan-Yong Jung et al., "Design and Analysis of Low-Power and Low-Noise Single Slope ADC for Digital Pixel Sensors", IS&T International Symposium on Electronic Imaging 2022, Imaging Sensors and Systems 2022, 2022. https://doi.org/10.2352/ei.2022.34.7.iss-256