WORKSHOP PAPER
A High Speed Pipelined Snapshot CMOS image sensor with 6.4 Gpixel/s data rate
Bart Cremers1, Mukund Agarwal1, Tom Walschap1, Rajiv Singh1, Tomas Geurts1
1Cypress Semiconductor, Schaliënhoevedreef 20B, 2800 Mechelen, Belgium

Abstract

This paper describes a high sensitivity, high speed CMOS image sensor, implemented in a 0.18 um CMOS process. The sensor runs at 6242 fps for a maximum frame size of 1280 x 800, resulting in a data throughput of 6.4 Gpixel/s. By reducing the window size to 128 x 8, the frame rate can be boosted to no less than 1 Mfps. The sensor architecture is designed to increase parallelism by merging 2 sensors of frame size 1280 x 400, read out simultaneously on opposite sides of the die. The pixel size of 20 x 20 um2 results in a high responsivity and dynamic range. The sensor incorporates features such as pipelined, snapshot shutter operation and an Anti-Blooming feature to increase dynamic range.
Publisher: IISS (Int. Image Sensors Society)
Year: 2009
Workshop: IISW
URL: https://doi.org/10.60928/93vk-x07d

Keywords

CMOS image sensor, High speed, High sensitivity,

References