WORKSHOP PAPER
3D-Stacked SPAD Sensor with In-Pixel Multi-Frame Storage for Photon Counting and Time Resolved Applications
Abstract
We present a 3D-stacked BSI SPAD sensor architecture with high memory storage capacity enabling multi-frame and multi-bin photon counting and time resolved applications. The sensor utilizes an in-pixel SRAM macro with a SPAD driven precharge-read-increment-write operation based on a compact linear feedback shift register (LFSR) implementation. This allows for a 21.5µm pixel pitch with 16 memory locations and 18-bits each in a 65nm bottom tier process.Keywords
3D-stacked, SPAD, sensor, multi-frame storage, photon counting, time resolved, SRAM, linear feedback shift register, bottom tier process,References
[1]) T. Al Abbas et al., "T. Al Abbas et al., "A 128×120 5-Wire 1.96mm2 40nm/90nm 3D Stacked SPAD Time Resolved Microendoscopy," Symposium on VLSI Circuits, Kyoto, Japan, pp. C260-C261, 2019.", Symposium on VLSI Circuits, 2019
[2]) J. Ogi et al., "J. Ogi et al., "7.5 A 250fps 124dB Dynamic-Range SPAD Image Sensor Stacked with Pixel-Parallel Photon Counter Employing Sub-Frame Extrapolating Architecture for Motion Artifact Suppression," IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA, pp. 113-115, 2021.", IEEE International Solid-State Circuits Conference (ISSCC), 2021. https://doi.org/10.1109/isscc42613.2021.9365977
[3]) K. Morimoto et al., "K. Morimoto et al., "3.2 Megapixel 3D-Stacked Charge Focusing SPAD for Low-Light Imaging and Depth Sensing," IEEE International Electron Devices Meeting (IEDM), San Francisco, CA, USA, pp. 20.2.1-20.2.4, 2021.", IEEE International Electron Devices Meeting (IEDM), 2021
[4]) Y. Ota et al., "Y. Ota et al., "A 0.37W 143dB-Dynamic-Range 1Mpixel Backside-Illuminated Charge-Focusing SPAD Image Sensor with Pixel-Wise Exposure Control and Adaptive Clocked Recharging," IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA, pp. 94-96, 2022", IEEE International Solid-State Circuits Conference (ISSCC), 2022. https://doi.org/10.1109/isscc42614.2022.9731644
[5]) T. Takatsuka et al., "T. Takatsuka et al., "A 3.36 µm-pitch SPAD photon-counting image sensor using clustered multi-cycle clocked recharging technique with intermediate most-significant-bit readout," IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), Kyoto, Japan, pp. 1-2, 2023.", IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023. https://doi.org/10.23919/vlsitechnologyandcir57934.2023.10185241
[6]) R. K. Henderson et al., "R. K. Henderson et al., "5.7 A 256×256 40nm/90nm CMOS 3D-Stacked 120dB Dynamic-Range Reconfigurable Time-Resolved SPAD Imager," IEEE International Solid-State Circuits Conference - (ISSCC), San Francisco, CA, USA, pp. 106-108, February 2019.", IEEE International Solid-State Circuits Conference - (ISSCC), 2019
[7]) P. Padmanabhan et al., "P. Padmanabhan et al., "7.4 A 256×128 3D-Stacked (45nm) SPAD FLASH LiDAR with 7-Level Coincidence Detection and Progressive Gating for 100m Range and 10klux Background Light," IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA, pp. 111-113, 2021.", IEEE International Solid-State Circuits Conference (ISSCC), 2021. https://doi.org/10.1109/isscc42613.2021.9366010
[8]) D. Stoppa et al., "D. Stoppa et al., "A Reconfigurable QVGA/Q3VGA Direct Time-of-Flight 3D Imaging System with On-chip Depth-map Computation in 45/40nm 3D-stacked BSI SPAD CMOS,” International Image Sensors Workshop, 2021.", International Image Sensors Workshop, 2021
[9]) C. Zhang et al., "C. Zhang et al., "A 240 × 160 3D-Stacked SPAD dToF Image Sensor With Rolling Shutter and In-Pixel Histogram for Mobile Devices," in IEEE Open Journal of the Solid-State Circuits Society, vol. 2, pp. 3-11, 2022.", IEEE Open Journal of the Solid-State Circuits Society, 2022
[10]) M. Wojtkiewicz et al., "M. Wojtkiewicz et al., "Review of Back-Side Illuminated 3-D-Stacked SPADs for Time-of-Flight and Single-Photon Imaging", in IEEE Transactions on Electron Devices, vol. 71, no. 6, pp. 3470-3477, June 2024.", IEEE Transactions on Electron Devices, 2024