WORKSHOP PAPER
A 32x32 50ps Resolution 10 bit Time to Digital Converter Array in 130nm CMOS for Time Correlated Imaging
Justin Richardson1,2, Richard Walker1,2, Lindsay Grant2, David Stoppa3, Fausto Borghetti3, Edoardo Charbon4,5, Marek Gersbach4,5, Robert K. Henderson1
1The University of Edinburgh, Edinburgh, UK
2STMicroelectronics, Imaging Division, Edinburgh, UK
3Fondazione Bruno Kessler, Trento, Italy
4EPFL, Lausanne, Switzerland
5TU Delft, Delft, The Netherlands

Abstract

We report the design and characterisation of a 32x32 time to digital (TDC) converter plus single photon avalanche diode (SPAD) pixel array implemented in a 130nm imaging process. Based on a gated ring oscillator approach, the 10 bit, 50m m pitch TDC array exhibits a minimum time resolution of 50ps, with accuracy of ±0.5 LSB DNL and 2.4 LSB INL. Process, voltage and temperature compensation (PVT) is achieved by locking the array to a stable external clock. The resulting time correlated pixel array is a viable candidate for single photon counting (TCSPC) applications such as fluorescent lifetime imaging microscopy (FLIM), nuclear or 3D imaging and permits scaling to larger array formats.
Publisher: IISS (Int. Image Sensors Society)
Year: 2009
Workshop: IISW
URL: https://doi.org/10.60928/gjqg-e75s
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Keywords

Time to Digital Converter, Time Correlated Imaging, Single Photon Avalanche Diode,

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