WORKSHOP PAPER
A 14-bit, 33-Mpixel, 120-fps Image Sensor with DMOS Capacitors in 90-nm/65-nm CMOS
T. Yasue1, K. Kitamura1, T. Watabe2, H. Shimamoto1, T. Kosugi3, T. Watanabe3, S. Aoyama3, M. Monoi4, Z. Wei5, S. Kawahito5
1NHK Science and Technical Research Laboratories, 1-10-11 Kinuta, Setagaya-ku, Tokyo 157-8510, JAPAN
2NHK Engineering System Inc., Japan
3Brookman Technology, Inc., Japan
4Toshiba Corporation Semiconductor & Storage Products Company, Japan
5Shizuoka University, Japan

Abstract

We fabricated a 33-Megapixel and 120-fps CMOS image sensor with 14-bit analog-to-digital converters (ADCs) using depletion-mode MOS (DMOS) capacitors. The DMOS capacitor has high capacitance density, whereas its capacitance depends on input voltage. Hence it has been not thought to be suitable for ADCs. We used two-stage cyclic ADC architecture with a split-sampling-capacitor method to reduce the differential non-linearity (DNL) of ADC. As a result, the fabricated image sensor exhibited a DNL of +0.95/-0.80 LSB, realizing genuine 14-bit resolution.
Publisher: IISS (Int. Image Sensors Society)
Year: 2015
Workshop: IISW
URL: https://doi.org/10.60928/hhhl-8alz

Keywords

33-Megapixel, 120-fps CMOS image sensor, 14-bit ADC,

References

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