WORKSHOP PAPER
A 1/1.7-inch 20Mpixel Back-Illuminated Stacked CMOS Image Sensor with Parallel Multiple Sampling
Hayato Wakabayashi1, Atsushi Suzuki1, Toshiki Kainuma1, Chihiro Okada1, Naoki Kawazu1, Takumi Oka1, Kensuke Koiso2, Atsushi Masagaki1, Youichi Yagasaki1, Shigeru Gonoi3, Tatsuya Ichikawa1, Tohru Ueda1, Masatoshi Mizuno3, Tatsuya Sugioka1, Takafumi Morikawa1, Yoshiaki Inada1
1Sony Corporation, 4-14-1 Asahi-cho, Atsugi-shi, Kanagawa, 243-0014 Japan
2Sony Semiconductor Corporation, 4000-1 Haramizu, Kikuyo-machi, Kikuchi-gun, Kumamoto, 869-1102 Japan
3Sony LSI Design Inc., 4-16-1 Okada, Atsugi-shi, Kanagawa, 243-0021 Japan

Abstract

We have developed a 1/1.7-inch 20Mpixel back-illuminated stacked CMOS image sensor with parallel multiple sampling plus the two simultaneous output streams. This sensor has achieved the RMS random noise of 1.3e- with the parallel multiple sampling and the two simultaneous output streams of 4Mpixel for a movie mode and 16Mpixel for a still mode with a 2.3Gb/s/lane high-speed interface. The stacked structure realizes an analog implementation of the double column parallel ADCs.
Publisher: IISS (Int. Image Sensors Society)
Year: 2015
Workshop: IISW
URL: https://doi.org/10.60928/hm75-1fkx
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Keywords

CMOS Image Sensor, Back-Illuminated Stacked, Parallel Multiple Sampling,

References

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