WORKSHOP PAPER
A 1280 x 1024 Backside Illuminated CMOS Image Sensor with 0.75e- noise, 25fps and 120mW Power Consumption
Abstract
In this paper, we present a 1” sized, high sensitivity BSI sCMOS image sensor with a resolution of 1.3 MP (1280 x 1024) and large 9.76 μm x 9.76 μm pixels. The demand for low noise CMOS image sensor (CIS) is endless for scientific applications. Correlated multiple sampling (CMS) is a powerful technique widely reported to reduce temporal noise in CIS. However, it also has clear disadvantages, such as lower frame rate and higher power consumption because of multiple A/D conversions. To overcome these two main issues, we present a chip which features both CMS and low power double edge counting ADC[5] to optimize temporal noise, A/D rate and power consumption at the same time. Compared with the sensor presented in [6], dark noise decreases from 1.8e- to 0.75e-. Simultaneously, only 120mW power is consumed to run a 1.3Mpix sensor at 25fps.Keywords
Backside Illuminated CMOS Image Sensor, Low noise, Correlated multiple sampling,References
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