Abstract

A new analog-to-digital converter for CMOS image sensors is proposed which utilizes multiple parallel shifted ramps and a noise-shaping gated ring oscillator (GRO). This architecture is aimed at combining high-speed, low-noise and low-power performances, simultaneously with simple and uniform global single-slope ramps. The high speed performance is achieved by the phase-delay counting of the GRO and the overlapping shift of the ramps. In order to achieve low noise, multiple single-slope ramps are applied at the comparator input to average the input noise, and a local GRO, whose phases can be memorized, is placed at the digital backend to achieve a 1st-order quantization error shaping. For 13-bit resolution, the total conversion time is 305ns in 180nm CMOS technology. Since the proposed A/D converter is mostly composed of digital circuits, it can be considered as an all-digital approach which owns better performances in more scaled CMOS technologies.