WORKSHOP PAPER
A high PDE and high maximum count rate and low power consumption 3D-stacked SPAD device for Lidar applications
Abstract
We present a 10.17µm pitch 3D-stacked backside illuminated Single Photon Avalanche Diode (SPAD). The wafer stack features a fully custom top tier process which is highly optimized for optical performance and a 40nm bottom tier which enables dense and low-power signal processing, local to the pixel array. State-of-the-art pixel performance is presented with a specific focus on high-sensitivity, low power, and high-speed operation.Keywords
SPAD pixel, 3D 40nm SPAD technology, Low Power, High Count Rate, LIDAR, portable applications,References
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