WORKSHOP PAPER
A 32x32 SPAD Pixel Array with Nanosecond Gating and Analog Readout
Lucio Pancheri1, Nicola Massari1, Fausto Borghetti1, David Stoppa1
1Fondazione Bruno Kessler, Via Sommarive, 18, 38123 Trento, Italy

Abstract

CMOS Single Photon Avalanche Diode (SPAD) arrays are emerging as appealing solid-state detectors in imaging applications where high sensitivity and timing resolution are required. In this work, a 32x32-pixel array where SPAD digital output is processed in the analog domain in a 12-transistor pixel is presented. A 25um pixel pitch with a remarkable 20.8% fill factor was achieved thanks to a very compact pixel electronics, and gating pulse widths down to 1.1ns FWHM at 80MHz repetition rate were demonstrated.
Publisher: IISS (Int. Image Sensors Society)
Year: 2011
Workshop: IISW
URL: https://doi.org/10.60928/o38p-79rg
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Keywords

SPAD arrays, Nanosecond Gating, Analog Readout,

References

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