WORKSHOP PAPER
Backside-Illuminated 4-T Pinned Avalanche Photodiode Pixel for Readout Noise-Limited Applications
Tomislav Resetar1,2, Koen De Munck2, Luc Haspeslagh2, Piet De Moor2, Paul Goetschalckx2, Robert Puers1,2, Chris Van Hoof1,2
1KU Leuven, ESAT, 3001 Leuven, Belgium
2IMEC, 3001 Leuven, Belgium

Abstract

A novel pixel concept utilizing a backside-illuminated pinned avalanche photodiode (PAPD) manufactured in 130 nm minimally modified CMOS and operated by a standard four-transistor CMOS Image Sensor (CIS) readout is presented. This concept explores the possibility to increase the SNR by avalanche amplification in the low-light regime for applications that are limited by higher readout noise levels, e.g. high speed and global shutter. Customized avalanche junction implants were optimized and full pixel operation including pinning, light integration and charge transfer at -40 V substrate bias for a multiplication factor of 2–4 was simulated in 2D TCAD. Test arrays of 8x32 pixels with 5 and 10 µm pitch and fully-isolated on-chip CMOS readout were designed. Preliminary experimental results of avalanche and punch-through breakdowns on test-diodes show good agreement with TCAD simulations.
Publisher: IISS (Int. Image Sensors Society)
Year: 2015
Workshop: IISW
URL: https://doi.org/10.60928/u6xp-leii
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Keywords

Backside-Illuminated, Pinned Avalanche Photodiode, Readout Noise,

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