WORKSHOP PAPER
Noise Analysis of Pixel-Parallel ADC
Masaki Sakakibara1, Shin Sakai, Koji Ogawa, Koya Tsuchimoto, Kazuki Nomoto, Tsukasa Miura, Hirotsugu Takahashi, Yusuke Oike
1Sony Semiconductor Solutions Corporation, Atsugi-shi, Kanagawa, Japan

Abstract

This study discusses the noise of a pixel-parallel ADC. An image sensor using a pixel-parallel ADC was designed to operate on subthreshold current, usually less than 1 μA per pixel, constrained by the increase in the number of simultaneous operations of the comparator. Therefore, the mechanism of noise generation in this imager is dominated not by saturation but by diffusion current. We analyzed the design parameters having sensitivity to noise through a circuit model equation. The analysis and prototype measurement results were applied to the transient noise simulation performed using 90 nm-pixel/40 nm-logic model parameters. It was found that the effective design parameters are the operation current of the comparator, slope of the DAC, and load capacitance of the 2nd node. Finally, leveraging the feedback from this study, we designed a chip with stacked 25.2 Mpixels of 5.94 µm2, achieving 167 µVrms at 0 dB analog gain and 120 fps operation with a power consumption of 1545 mW at 14-bit resolution.
Year: 2025
Workshop: IISW
URL: https://doi.org/10.60928/v0qm-7ous
Download PDF

Keywords

pixel-parallel ADC, random noise, digital pixel, sensor, CMOS image sensor, subthreshold, single-slope,

References

1) T. Kato et al., "A Binocular CMOS Range Image Sensor with Bit-Serial Block-Parallel Interface Using Cyclic Pipelined ADC’s", Symp. VLSI Circuits Dig. Tech. Papers, pp. 270–271, 2002-Jun.. https://doi.org/10.1109/vlsic.2002.1015102
2) M. Mase et al., "A 19.5b Dynamic Range CMOS Image Sensor with 12b Column-Parallel Cyclic ADC's", IEEE Int. ISSCC, pp. 350–351, Feb. 2005.. https://doi.org/10.1109/isscc.2005.1494013
3) Y. Chae et al., "A 2.1Mpixel 120frame/s CMOS Image Sensor with Column-Parallel ΔΣ ADC Architecture", IEEE Int. ISSCC, pp. 394–395, 2010.. https://doi.org/10.1109/isscc.2010.5433974
4) C. Okada et al., "50.1-Mpixel 14-Bit 250-frames/s Back-Illuminated Stacked CMOS Image Sensor With Column-Parallel kT/C-Canceling S&H and ΔΣ ADC", IEEE JSSC, vol. 56, no. 11, pp. 3228–3235, Sep. 2021.. https://doi.org/10.1109/jssc.2021.3111154
5) M. Sakakibara et al., "A 6.9-µm pixel-pitch back-illuminated global shutter CMOS image sensor with pixel-parallel 14-bit subthreshold ADC", IEEE JSSC, vol. 53, no. 11, pp. 3017–3025, Nov. 2018.. https://doi.org/10.1109/jssc.2018.2863947
6) B. A. Fowler et al., "Techniques for Pixel Level Analog to Digital Conversion", vol. 3360, pp. 2–12, Sep. 1998.. https://doi.org/10.1117/12.321753
7) H. Y. Jung et al., "Design and Analysis on Low Power and Low Noise Single Slope ADC for Digital Pixel Sensors", Proc. Int. Image Sensor Workshop, Jun. 2022.. https://doi.org/10.2352/ei.2022.34.7.iss-256
8) S. Lee et al., "Temporal Noise Suppression Method using Noise-for-Pixel-Level Single-Slope ADC", International Image Sensor Workshop (IISW), P34, Sep. 2021.
9) D. X. D. Yang et al., "A Nyquist rate pixel level ADC for CMOS image sensors", IEEE JSSC vol. 34, no. 3, pp. 348–356, 1999.. https://doi.org/10.1109/4.748186
10) S. Kleinfelder et al., "A 10000 frames/s CMOS digital pixel sensor", IEEE JSSC vol. 36, no. 12, pp. 2049–2059, 2001.. https://doi.org/10.1109/4.972156
11) T. Kainuma et al., "A 25.2-Mpixel 120-frames/s Full-Frame Global-Shutter CMOS Image Sensor with Pixel-Parallel ADC", IEEE Int. ISSCC, Feb. 2025.. https://doi.org/10.1109/isscc49661.2025.10904642