WORKSHOP PAPER
Low-noise 3 -D Bending Pixel Transistor for Small Pixel CMOS Image Sensors
Kyoung eun Chang1, Dongmo Im1, Sung -in Kim1, DongHyun Kim1, Jonghyun Go1, Incheol Cho1, Jameyung Kim1, Yeonsoo Ahn1, You-Na Lee1, Chong Kwang Chang1, Kwangyoung OH1, SuHyun Kim1, Sanghoon Lee1, Kyumin Lee1, Jueun Kim1, Soojin Hong1, JinGyun Kim1, Hyunchul Kim1, Chong -Rok Moon1
1Semiconductor R&D Center, Samsung Electronics Co., Hwasung -City, Gyunggi -do, 18848, Republic of Korea

Abstract

This study demonstrated a low-noise back-illuminated CMOS image sensor by employing a three-dimensional (3-D) vertical gate structured bending transistor for in-pixel source-follower (SF) amplifiers. The novelty in design allowed for an increase in the effective channel area through a thoughtful 3-D gate structure into a bending type SF. The optimized SF structure showed significant improvements in trans-conductance and effective channel width by up to 9% and 20%, respectively, leading to a reduction of temporal random noise by 2% compared to the planar design. Further improvements and reduction in random noise were observed with variations in the depth of the vertical gate, demonstrating potential for scaling down pixel pitch crucial for high-resolution image sensors in future mobile markets.
Publisher: IISS (Int. Image Sensors Society)
Year: 2023
Workshop: IISW
URL: https://doi.org/10.60928/w1cc-z2sp
Download PDF

Keywords

CMOS Image Sensors, Vertical gate transistors, Source follower amplifiers, Bending transistor, Random noise, Thermal noise, Flicker noise, Temporal noise, Random Telegraph Signal Noise, RTS,

References

1) J. Park, et al., "1/2.74-inch 32Mpixel-Prototype CMOS Image Sensor with 0.64μm Unit Pixels Separated by Full-Depth Deep-Trench Isolation", International Solid-State Circuits Conference (ISSCC), Feb. 2021. https://doi.org/10.1109/isscc42613.2021.9365751
2) Park, Sungbong, et al., "A 64Mpixel CMOS Image Sensor with $0.50 \mu\mathrm {m}$ Unit Pixels Separated by Front Deep-Trench Isolation", 2022 IEEE International Solid-State Circuits Conference (ISSCC). Vol. 65., IEEE, 2022.. https://doi.org/10.1109/isscc42614.2022.9731750
3) P. Martin-Gonthier et al., "RTS noise impact in CMOS image sensors readout circuit", IEEE International Conference on Electronics, Circuits and Systems (ICECS), Dec. 2009.. https://doi.org/10.1109/icecs.2009.5410825
4) S. M. Amoroso, et al., "Investigation of the RTN distribution of nanoscale MOS devices from subthreshold to on-state", IEEE Electron Device Letters, 683, 2013. https://doi.org/10.1109/led.2013.2250477
5) Kim, Sung-in, et al., "Low-noise and high-performance 3-D pixel transistor for sub-micron CMOS image sensors applications", Proc. Int. Image Sensor Workshop., 2021.. https://doi.org/10.60928/tua4-6g76
6) Kitamura, Shota, et al., "Low-Noise Multi-Gate Pixel Transistor for Sub-Micron Pixel CMOS Image Sensors", 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), IEEE, 2022.. https://doi.org/10.1109/vlsitechnologyandcir46769.2022.9830386
7) Ou, Jack, and Pietro M. Ferreira., "A Unified Explanation of gm/ID-Based Noise Analysis", Journal of Circuits, Systems and Computers 24.01, 2015.. https://doi.org/10.1142/s0218126615500103
8) Shi, Zhongming, J-P. Mieville, and Michel Dutoit., "Random telegraph signals in deep submicron n-MOSFET's", IEEE Transactions on Electron Devices 41.7, 1994. https://doi.org/10.1109/16.293343